module mux4_1(InA, InB, InC, InD, S, Out);
	input InA, InB, InC, InD;
	input [1:0] S;
	output Out;
	wire out1, out2;

	mux2_1 instance1(InA, InB,S[0], out1);
	mux2_1 instance2(InC,InD,S[0], out2);
	mux2_1 instance3(out1,out2, S[1], Out);

endmodule
